The problem

When does grouping similar memory requests improve throughput at the cost of latency?

What current research shows

A shared memory controller arbitrates requests across cores and request types. Read/write direction changes have timing costs, so controllers use scheduling policies that must balance throughput, fairness, and latency.

Where the evidence stops

The exact timing and policy depend on DRAM generation, controller, workload, and memory topology.

What Valen Systems is testing

Track read latency, write latency, direction switches, queue age, throughput, and tail behavior under grouped and mixed request streams.

Sources

Mutlu and Moscibroda: parallelism-aware DRAM schedulingStaged memory scheduling for heterogeneous systems