The problem
How should a system account for service intervals during which parts of memory can’t respond normally?
What current research shows
DRAM cells require refresh and memory controllers must schedule maintenance alongside demand. The observable effect depends on device organization, refresh policy, access pattern, and controller behavior.
Where the evidence stops
Refresh behavior is device- and generation-specific; a public software scheduler can’t infer every internal timing detail.
What Valen Systems is testing
Use hardware-specific counters and controlled memory tests to separate refresh-related stalls from row conflicts, bandwidth saturation, and software overhead.